On-Chip Co-Processing Architectures for Concurrent Neuroelectrical and Hemodynamic Signal Analysis

Authors

  • V.Ramya Assistant professor, Department of CSE, Excel Engineering college, Kumarapalayam, Namakkal Author

Keywords:

On-chip processing, co-processing architecture, neuroelectrical signals, hemodynamic signals, multimodal biosignals, embedded systems, VLSI design

Abstract

The multimodal brain monitoring systems are progressively combining function of neuroelectrical signals, including electroencephalography (EEG), with hemodynamic signals, including functional near-infrared spectroscopy (fNIRS), to provide both the time-varying and metabolic definition of neural activity. Most current multimodal platforms are based on either off-chip computation or sequential signal processing pipelines, with the result that these platforms exhibit higher latency, power consumption, and do not work well in embedded and wearable applications. In this paper, an on-chip co-processing architecture will be described, designed to provide the capability to analyse both neuroelectrical and hemodynamic signals on the same embedded platform. The design proposed uses processing pipelines that are modality specific and work in parallel with the help of shared memory resource and synchronisation control logic to guarantee time alignment between modalities. Certain design decisions of hardware-based nature such as pipelined data processing, fixed-point calculation, and selective resource utilization are used to accomplish real-time functionality with low area and energy cost. An FPGA-based prototype was used to test the architecture and give it a feasibility evaluation. Experimental evidence indicates that there is an important decrease on end-to-end processing delay in relation to a sequential multimodal baseline, processing efficiency and energy per processed sample is also enhanced. These findings confirm the usefulness of on-chip parallel processing of multimodal neuro-monitoring loads. The suggested architecture offers scalable and energy-efficient real-time embedded brain monitoring and is an ideal solution to the next generation wearable neurotechnology and edge-based brain -computer interface systems.

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Published

2025-11-09

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Section

Articles

How to Cite

V.Ramya. (2025). On-Chip Co-Processing Architectures for Concurrent Neuroelectrical and Hemodynamic Signal Analysis. Journal of Integrated VLSI, Embedded and Computing Technologies , 3(1), 64-70. https://ecejournals.in/index.php/JIVCT/article/view/491