Performance Evaluation of CNTFET-Based 6T SRAM Cell for Next-Generation VLSI Circuits

Abstract

In an attempt to increase the performance of memory within the next generation of VLSI circuits Carbon Nanotube Field-Effect Transistors (CNTFETs) have been of great interest as possible replacements of conventional CMOS transistor devices, due to their high degree of electrostatic integrity, ballistic range of carrier transport, high current drive sensitivity and good scaling performance. The paper proposes the design, modeled and performance analysis of a 6T SRAM (Static Random Access Memory) cell using CNTFET (Carbon Nanotube Field Effect Transistor) at 32nm technology node that deploys the Stanford CNTFET SPICE model to perform realistic device level simulation. The suggested design used the same convention 6-transistor design, but instead of using CMOS components, it uses equivalent CNTFET devices so it remains functionally compatible and it is easy to benchmark the ideas. The most important performance indicators, like static noise margin (SNM), read/write access delay, power dissipation, and resistance to process-voltage-temperature (PVT) variations are thoroughly discussed and compared to that of a typical CMOS 6T SRAM implementation. The simulation results promote that the CNTFET based 6T SRAM configuration has better SNM, lesser dynamic power dissipation, and speedier write performance and hence a strong candidate in high performance, low power embedded memory architectures. In particular, CNTFET SRAM PNM shows ~60x better SNM and as much as 40x lower write power as CMOS, due to superior electrostatic control and tunability of threshold voltage possible in CNTFETs. Moreover, small-scale size and relativistic semiconducting characteristics of CNTFETs make them even more adaptable to customize to suit area and energy efficiency. It is process robust, and read/ write operations are stable over a broad range of both voltages and temperatures. These properties make CNTFET-based SRAM a surrounding application in ultra-dense memory systems of the next-generation computing system (mobile processors, AI accelerators, and low-power SoCs). The study presents a promising outlook of the CNTFET technology and potential of this technology in changing the field of memory-centric VLSI design and makes an appeal towards undertaking more study on the integration of CNTFET technology to circuits and system-level.