Photonic VLSI Architectures for Ultra-Low-Latency High-Speed Signal Processing in 6G Edge Networks

Abstract

The demand-driven by next-generation wireless networks has caused exponential growth in the number of applications that use data and the latency and throughput of data processing at an edge scale. Although traditional electronic Very-Large-Scale Integration (VLSI) designs have been well developed, they face fundamental challenges in terms of speed, bandwidth scalability, and energy efficiency skills, mainly in the polarizing performance demands of 6G edge environments. The paper offers the fresh idea of a photonic VLSI that incorporates the silicon photonics into a traditional VLSI structure to address these bottlenecks. It is proposed that the photonic-based interconnects, logic gates implemented in MachZehnder interferometer (MZI), and wavelength-division multiplexing (WDM) will be used in the proposed architecture to provide parallel high-bandwidth optical transmission of data and parallel computation of signals at ultra-fast speed. We describe a modular systems-based optics design flow and thoroughly simulate-based benchmark with the state of the art CMOS systems. Our findings prove that the architecture can operate up to 62 per cent faster in terms of latency, 5.2 times faster in terms of content delivery performance and corresponding low values of energy-per-bit, which proves the applicability of the approach in real-time signal processing in 6G edge networks. The overall learning point of the study is that photonic VLSI systems provide a scalable and energy-efficient avenue to address the excessive requirements of terabit-scale edge intelligence in subsequent 6G systems and establish the foundation of the future hybrid optoelectronic compute architecture.