Reconfigurable Operating System Support for Heterogeneous SoC Platforms with FPGAs and GPUs

Abstract

And the current Systems-on-Chip architectures are becoming very heterogeneous, combining spatial parallelism of Field-Programmable Gate Arrays (FPGAs) with a higher throughput temporal parallelism of Graphics Processing Units (GPUs). In spite of its potential, conventional operating systems identify these accelerators as remote I/O peripherals, leaving the developer with the resource management and synchronisation challenges to the application developer. This paper suggests a Reconfigurable Operating System (ROS) platform that will supply heterogeneous accelerator support in a native and unified manner. The area of this work covers Virtual Accelerator Layer (VAL) which an abstracts hardware specific binaries and Latency-Aware Hybrid Scheduler, which dynamically allocates tasks to an optimal execution unit depending on the current availability of resources and power limits. The ROS uses a Unified Memory Management Unit (UMMU) to support the zero-copy sharing of data between the CPU, FPGA, and GPU domains to address the issue of data movement bottlenecks. Our implementation of the ROS was a Xilinx Zynq UltraScale+ platform that included a discrete GPU. Mixed-workload benchmark experimental performance shows that our OS-level integrations of work execution facilitate faster execution of tasks by as much as 25% and can reduce energy consumption by up to 30% through the use of conventional driver-based manual work management. The ROS has been used to achieve better utilisation of the hardware-software interface and easier development of more complicated, multi-accelerator applications by virtualizing the hardware-software interface. This study illustrates that accelerator management needs to be transferred to OS kernel to have the next generation, power efficient, and high performance heterogeneous SoCs.