Performance Evaluation of mmWave RF Circuits for High-Data-Rate 6G Wireless Communication Systems

Abstract

The 6G wireless communication system is projected to achieve ultra-high frequency rate of more than 100 Gbps, less than one milliseconds of latency and continuous connexion of massive scale by utilising millimetre-wave (mmWave) and low terahertz frequencies. The high demands on RF front-end circuits are required to meet these high targets, the performance of which at higher frequencies is very poor, both because they suffer dire path loss and transistor gain, and especially because of parasitic terms such as reduced voltage headroom, thermal instability and process variability. This paper has conducted a system performance assessment of the major mmWave RF building blocks containing low-noise amplifiers (LNAs), power amplifiers (PAs), mixers, and voltage-controlled oscillators (VCOs) used in 6G transceivers at 28 GHz, 60 GHz, and 100 GHz. Characterization and analytical modeling and simulation are done through the application of sophisticated 45 nm CMOS, SiGe BiCMOS technologies, in order to study frequency scalability and trade-offs determined by technology. Such critical performance indicators as gain, noise figure (NF), input third-order intercept point (IP3), power-added efficiency (PAE), phase noise, bandwidth, and thermal behaviour are retrieved and compared across bands. Experiments indicate strong effects of efficiency and linearity loss above 60 GHz, phase noise enhancement at 100 GHz because of the Q-factor factors, and the high-frequency resiliency of SiGe BiCMOS is much better than CMOS. The paper also establishes trade-offs between the various designs as to power efficiency, spectral purity, and integration complexity, which can be useful in offering actionable optimization rules to energy-efficient high-data-rate 6G RF front-end designs.