Terabit-per-Second Photonic–Nanoelectronic Devices for Data Center Interconnects

Abstract

The cloud system as well as the workload and high-performance data analytics have been experiencing an exponential growth leading to unprecedented demand of ultrafast/energy-efficient data center interconnects (DCIs). Traditional electronic transceivers are more and more confined in band-density, power burning and signal uprightness at far reaches. We describe a terabit-per-second photonic nanoelectronic DCI architecture comprising silicon photonics, plasmonic modulators and novel CMOS-compatible nanoelectronics which integrates with the rest of the system. The combination of wavelength-division multiplexing (WDM), compact photonic integrated circuits (PICs) and low-power modulation allow the proposed system to provide an aggregate throughput of more than 1Tb/s per link and an energy efficiency of less than pJ/bit per link. Photonic components and nanoelectronic circuitry were modelled on a device-level basis in Lumerical FDTD and Cadence Spectre respectively, with system-level assessments made using VPItransmissionMaker on WDM link optimization. Simulation results show a 1.6 Tb/s link capacity, 0.28 pJ/bit and a reach of 2km with negligible BER penalty compared to their competitors which include conventional CMOS SerDes and stand-alone silicon photonics. This paper demonstrates the promises of photonicnanoelectronic co-design to next-generation hyperscale data center deployment providing a scalable low-latency and thermally resilient platform to future cloud and AI-enabled computing infrastructure.