Latha B, “Thermal-Aware Floorplanning and Power Optimization Techniques for 3D Integrated SoC Architectures”, Journal of Integrated VLSI, Embedded and Computing Technologies, vol. 3, no. 3, pp. 22–33, May 2026, Accessed: Mar. 05, 2026. [Online]. Available: https://ecejournals.in/index.php/JIVCT/article/view/533