MATTEO FERRARI. High-Performance Network-on-Chip Architecture with Congestion-Aware Adaptive Routing for Heterogeneous Multi-Core VLSI Systems. Journal of Integrated VLSI, Embedded and Computing Technologies , [S. l.], v. 3, n. 3, p. 43–50, 2026. Disponível em: https://ecejournals.in/index.php/JIVCT/article/view/535.. Acesso em: 5 mar. 2026.