Secure and Scalable Runtime Reconfiguration Framework for FPGA-Based Edge AI in Industrial IoT Systems

Abstract

The expansion of IIoT systems requires the intelligence of real-time decision-making at the edge, where real-time performance, security, and power are decisive parameters. FPGAs provide an excellent opportunity to implement AI workloads in such environments thanks to their flexibility in terms of programmability and the presence of a parallel processing horizon. Nevertheless, the most traditional FPGA-based solutions can be vulnerable to lack secure and scalable runtime reconfiguration, which reduces the flexibility in dynamic IIoT usage. In this paper, a new framework is proposed that facilitates secure and scalable, suitably with data change, execution of AI on edge field-programmable gate arrays (FPGAs) in IIoT networks. The framework combines the lightweight cryptographic engine designed to authenticate bitstreams, the programming dynamic reconfiguration manager, a part-task swapping, and the scaling orchestrator, which addresses the distributed deployment at the edge. Representative experimental evaluations on realistic workloads in AI, i.e., anomaly detection, and object recognition, validate the effectiveness of the proposed system to achieve low-latency inference, low-energy overhead, and resistant to bitstream tampering. The framework provides a basis of robust and resilient, flexible and reliable AI implementation in mission-critical IIoT use cases.