Design and Implementation of Fault-Tolerant Runtime Reconfigurable Architectures for Space and Mission-Critical Systems

Abstract

Space and mission-critical systems pose demanding requirements in terms of system reliability, energy efficiency and the adaptation to fault-prone and dynamic surroundings. In this work, a detail of the design and implementation of a fault-tolerant low cost run time reconfigurable architecture carried out on Field-Programmable Gate Arrays (FPGAs) is explored with specific consideration to space-based and aerospace applications. Use of Dynamic Partial Reconfiguration (DPR) proposed in the system will isolate and recover system to hardware faults like single-event upsets (SEUs) without disturbing the system functionality. This architecture has a very lightweight real-time fault monitor, a context- sensitive configuration manager and reconfigurable regions (RRs) that perform mission critical operations. That system is deployed on a Xilinx Zynq UltraScale+ MPSoC and verified using a fault injection methodology that simulates radiation errors. The technique incorporates modular bitstream storage as well as partitioning of runtime logic so that repair of damaged areas can be accomplished smoothly, and the operational continuity is ensured. According to experimental assessment, the fault recovering is more than 95%, and the average reconfiguration latency is less than 10 ms, and the power overhead less than 5%, which greatly facilitates the applicability of this scheme in the in-orbit reconfiguration, UAV control systems, and planetary robotics. The design provides an accommodating and modular system that can be scaled to provide resilience and durability of the hardware in extreme conditions. The contribution of this work is a sturdy framework that achieves reliable FPGA-based systems in space missions in the future, and upcoming directions involve AI-aided fault prediction, security-free bitstream delivery, and thermally-aware reconfiguration scheduling.