Carbon Nanotube and 2D Material-Enabled Nanoelectronics for Next-Generation High-Performance Circuits

Authors

  • Mohammad Mirabi Ayatollah Haeri University of Meybod, Iran Author
  • Amany Gouda Tabuk University, Saudi Arabia Author

DOI:

https://doi.org/10.17051/JEEAT/01.04.02

Keywords:

Carbon Nanotubes (CNTs), 2D Materials, Graphene, MoS₂ Transistor, Hexagonal Boron Nitride (h-BN), CNTFET, Nanoelectronics, High-Performance Circuits, Flexible Electronics, Low-Power Design, CMOS Integration, Advanced Interconnects, Scalable Device Architectures.

Abstract

The aggressive scaling of silicon based complementary metaloxide semiconductor (CMOS) technology is also nearing fundamental physical and economic limits, and new materials are being investigated to make next-generation nanoelectronic circuits. Carbon nanotubes (CNTs) and two dimensional (2D) materials, such as graphene, molybdenum disulfide (MoS'(2)), and hexagonal boron nitride (h-BN), have come to be considered transformational candidates due to their superb electrical conductivity, high carrier mobility, excellent thermal management, and flexibility. This paper outlines an extensive literature review and investigation of CNT- and 2D material powered nanoelectronics to be used in high-performance, energy-efficient circuitry. First, the inherent characteristics of such materials, including their manufacturing methodology, and key device level parameters governing circuit performance will be studied. It is discussed also in CNT-based field-effect transistors (CNTFETs), MoS 2 thin-film transistors (TFTs), and hybrid heterostructure devices, in terms of especially scaling behavior, electrostatic control, and integration with interconnects. Comparative simulation and experimental reports suggested that CNTFET-based logic gates could improve energydelay product by up to 3x and reduce static power dissipation by ~40 percent compared to state of the art FinFET nodes, and that MoS 2-based transistors can exhibit ON /OFF ratios greater than 106 and subthreshold swings as low as a few times the thermionic limit ( ~60 mV/dec). Fabrication issues--such as chirality control, wafer-scale transfer, reduction of contact resistance, and compatibility with CMOS-compatible thermal budgets--are also discussed, as well as recent developments in the use of directed self-assembly and low-temperature growth techniques. Lastly, application areas that are potential, which include: ultra-low-energy computing, flexible electronics, terahertz communication, and neuromorphic computer, are identified. With this homework (bridging materials science, device engineering, and circuit design), this paper presents a clear path to making CNTs and 2D materials useful in large-scale, commercially viable nanoelectronic systems.

Additional Files

Published

2025-08-11

Issue

Section

Articles

How to Cite

Carbon Nanotube and 2D Material-Enabled Nanoelectronics for Next-Generation High-Performance Circuits. (2025). National Journal of Electrical Electronics and Automation Technologies , 1(4), 9-19. https://doi.org/10.17051/JEEAT/01.04.02