CMOS Power Amplifier, Internet of Things (IoT), Enhanced Linearity, Class-AB Amplifier, Adaptive Biasing, Analog Predistortion, Low-Power RF Design, Adjacent Channel Power Ratio (ACPR), Wireless Sensor Nodes, Energy-Efficient Transmitter Design
Abstract
Growth of Internet of things (IoT) has demanded miniaturisation, low power consumption and maximum linearity of power amplifiers (PAs) needed to be easily integrated in wireless sensor nodes with very low power and minuscule size restrictions. The design and optimization of a low profile, CMOS compatible power amplifier specifically suited to such IoT transmitters is described in this paper, with the core objective being to achieve a very low power point in operation with superb linearity in support of the most complex modulation schemes. The gears of the suggested PA are founded on the two-stage Class-AB approach, and they unite the power effectiveness and the linear amplification of the signal. The most significant improvements are adaptive biasing circuitry, which dynamically sets the quiescent current to the input envelope value, and low-cost analog predistortion (APD) scheme integrated with source degeneration to cancel third-order intermodulation products and improve adjacent channel power ratio (ACPR). It is fabricated with a 65 nm CMOS process so it can be considered low-cost andhigh-volume integration. Simulation outputs show the peak output power is 15 dBm at power-added efficiency (PAE) of 32% when amplifier is tested with 16-QAM modulated signal, which proves it capable of being used in IoT applications where linearity is required during transmission. The amplifier also has good thermal and process stability and the output performance varies little over a wide temperature range ( down to -20C and to +85C ) The core runs on a silicon die of only 0.45 mm 2, which allows it to be integrated in the system-on-chip (SoC) structures. The work emphasizes a valuable direction to reach to high-linearity RF transmission in IoT nodes with having neither great complexity of design nor space penalties, leading to more efficient and stable wireless communication subsystems in next generation of connected, low-power devices.
