A Review of Fault-Tolerant Reconfigurable Architectures for Autonomous Systems Based on Redundant Logic Mapping

Abstract

Mission-critical applications (aerospace, automotive, and defense) have autonomous systems that must have very high reliability to allow continued operation in varied environmental structures and fault conditions. The medium of flexibility and adaptability of the computer hardware is represented by reconfigurable computing platforms and, especially, by Field-Programmable Gate Arrays (FPGAs) and Coarse-Grained Reconfigurable Architectures (CGRAs). The review will provide an orderly research into the fault-tolerant reconfigurable architecture with an interest in redundant logic mapping which encompasses spatial, temporal, and hybrid redundancy model. We study important analysis metrics including Mean Time to Failure (MTTF), fault coverage, resources overhead and reconfiguration latency. Recent literature shows comparative results that hybrids are able to provide the MTTF with up to 3.5x scaling without a drastically high resource overhead (~2.1x LUTs, +25% power). The relevance also points to the real use in self-governing frameworks e.g. UAV, self-governing automobiles, and smart robotics, where fault cloaking, configuration abrasive, and flawless cycles are fundamental. Lastly, it presents open research issues in scalable fault diagnosis, AI-based reconfiguration as well as cross layer fault resilience, and states a guideline towards the design of next generation self-sustainable systems comprising of both economic and fault tolerant systems.