A RISC-V Based Embedded Security Architecture for Trusted Execution in Industrial Control Systems

Abstract

Industrial Control Systems (ICS) have become more vulnerable to cyber threats as they have emerged in the digital world, in particular, embedded environments that face limits to power, cost, and latency. A new embedded security architecture has been presented in this paper based on the open-source RISC-V instruction set architecture (ISA) to support trusted execution within the ICS setting. The first goal is to be able to create a low-overhead, transparent, and scalable system, which is enforcing hardware-based trust but without affecting the real-time performance. The architecture proposed incorporates a lightweight hardware Root of Trust (RoT), secure bootloader, memory protection units (MPUs) and minimal Trusted Execution Environment (TEE) as part of a bespoke RISC-V core. Important architectural updates are register-level TEE isolation, crypto-integrity verification, and hardware-accelerated AES-GCM and SHA-256. The system is run on a 32-bit RV32IM RISC-V and tested against real-time industrial protocols (Modbus, OPC-UA) and code injection, denial-of-service emulations. Through experimental evaluations, it is shown how the architecture is able to attain a security enhancement score of 92.4 % and blocks more than 91 % of the injected threats but without much overhead (execution time overload of 3.9-4.7 %). These results attest the feasibility of code-attestable, hardware-based security assimilation into ICS embedded systems, which makes a potential gateway to open and trusted, scale-able industrial automation.